第444回化学システム工学専攻公開セミナー Materials Innovations for Next Generation Electronics
- 日時
- 2026年1月19日（月）14:30-16:00
- 場所
- 工学部3号館320セミナー室（セミナー室１）
| 講演題目 | Materials Innovations for Next Generation Electronics |
|---|---|
| 講演者 | Prof. Jeehwan KIM Professor, Department of Materials Science and Engineering, MIT https://jeehwanlab.mit.edu/ Biography Prof. Jeehwan Kim is a tenured faculty at MIT. His research group focuses on material innovations for next generation computing and electronics. Prof. Kim joined MIT in September 2015. Before joining MIT, he was a Research Staff Member at IBM T.J. Watson Research Center in Yorktown Heights, NY since 2008 right after his Ph.D. He worked on next generation CMOS and energy materials/devices at IBM. Prof. Kim is a recipient of 20 IBM high value invention achievement awards. In 2012, he was appointed a “Master Inventor” of IBM. After joining MIT, he continuously worked nanotechnology for advanced electronics/photonics and their 3D systems. As its recognition, he received LAM Research foundation Award, IBM Faculty Award, DARPA Young Faculty Award, and DARPA Director’s Fellowship. He was also elected as Samsung Fellow in 2022. He is an inventor of > 200 issued/pending US patents and an author of > 100 articles in peer-reviewed journals. He currently serves as Associate Editor of Science Advances, AAAS. He received his B.S. from Hongik University, his M.S. from Seoul National University, and his Ph.D. from UCLA, all of them in Materials Science. |
| 概要 | Abstract: (attached) 3D heterogeneous integration, which involves vertically stacking wafers with embedded electronic devices, is emerging as the leading approach for augmenting the performance of electronics and optoelectronics. This method, however, demands complex procedures including creating through-silicon vias (TSVs), filling these vias with copper, and bonding the wafers via micro-bumps or Cu hybrid bonding. Eliminating the use of wafers in this complex 3D assembly, a.k.a. monolithic 3D (M3D), could streamline the process and reduce the length of data paths. Yet, current technologies scarcely allow for the removal and reassembly of active single-crystalline devices from wafers. Moreover, directly epitaxial growths onto existing circuits present additional hurdles. Over the last decade, my group at MIT has pioneered epitaxy techniques for advancing wafer-free M3D integration of single-crystalline semiconductor devices. Firstly, I will introduce our innovation in transfer-based M3D integration of single-crystalline devices based on remote epitaxy [1-7]. Secondly, I will introduce our recent development of growth-based M3D integration by successfully implementing single-crystalline channel material growths directly on integrated circuits at a BEOL-compatible temperature [8-9]. This really unlocks the way to seamless monolithic integration for advanced 3D logic/memory and AI systems. References: [1] Nature 544, 340 (2017), [2] Nature Materials 17, 999 (2018), [3] Nature Materials 18, 550 (2019), [4] Nature Nanotechnology 15, 272-276 (2020), [5] Nature, 578, 75 (2020), [6] Nature, 614, 81 (2023), [7] Nature Electronics, 5, 386 (2022), [8] Nature, 614, 88 (2023), [9] Nature (2024) |
| 世話人 | Vincent Tung |